# Fanuc Power Mate i-D/H Maintenance Manual

7. TROUBLESHOOTING
B63175EN/03
408
#7
3003
#6 #5 #4 #3
DIT
#2
ITX
#1
HITL
#0
ITL
ITL=0 shows interlock signal *IT is effective. To 1
HITL = 1 shows interlock signal *RILK is effective. To 2
ITX=0 shows interlock signal *ITn is effective. To 3
DIT=0 shows interlock signal "MITn is effective. To 4
Check state of effective interlock signals using the diagnostic function
(PMCDGN) of the PMC.
1 Interlock signal (*IT) is input
#7
G0008
#6 #5 #4 #3 #2 #1 #0
*IT
*IT=0 shows that interlock signal is input.
2 Highspeed interlock signal (*RILK) is input.
#7
X0000
#6
*RILK
#5 #4 #3 #2 #1 #0
*RILK = 0 shows interlock signal is input.
3 Axis interlock signal (*ITn) is input
#7
*IT8G0130
#6
*IT7
#5
*IT6
#4
*IT5
#3
*IT4
#2
*IT3
#1
*IT2
#0
*IT1
*ITn=0 shows interlock signal is input.
4 Interlock signal per axis and direction (" MITn) is input
#7
+MIT8G0132
#6
+MIT7
#5
+MIT6
#4
+MIT5
#3
+MIT4
#2
+MIT3
#1
+MIT2
#0
+MIT1
MIT8G0134 MIT7 MIT6 MIT5 MIT4 MIT3 MIT2 MIT1
"MITn=1 shows interlock signal per axis and direction is input.
Check the signals using PMCs diagnostic function (PMCDGN)
#7
*JV7G0010
#6
*JV6
#5
*JV5
#4
*JV4
#3
*JV3
#2
*JV2
#1
*JV1
#0
*JV0
*JV15G0011 *JV14 *JV13 *JV12 *JV11 *JV10 *JV9 *JV8
When the override is 0% all bits of the above address becomes
1111 1111 or 0000 0000.. . . . . . . .
*JV15 JV0. . . . . . . . . . Override
1111 1111 1111 1111
1111 1111 1111 1110
:
1101 1000 1110 1111
:
0000 0000 0000 0001
0000 0000 0000 0000
0.00%
0.01%
:
100.00%
:
655.34%
0.00%
In this case, RESET is also displayed on the status display. Check it using
the procedure of 1 above.
c. Jog feedrate override is
0%
d.Power Mate is in a reset
state