
9. CONNECTION TO FANUC I/O Link
B–63523EN/03
352
The keyboard of the machine operator’s panel employs a matrix
configuration. If three or more keys are simultaneously entered in the
matrix DI configuration, a DI signal is erroneously entered due to an
abnormal current flow. A countermeasure for this malfunction can be
implemented using a ladder program.
(Protection against malfunction)
If three or more keys are entered in the matrix DI configuration, all key
inputs after the first two are invalidated. If there are no additional key
inputs after three or more invalidated key inputs, and if the total number
of inputs is two or less, all key inputs that have been performed up to that
time are valid.
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (a)
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (b)
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (c)
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (d)
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (e)
Common line 1 (Xm+4)
Common line 2 (Xm+5)
Common line 3 (Xm+6)
Common line 4 (Xm+7)
Common line 5 (Xm+8)
Common line 6 (Xm+9)
Common line 7 (Xm+10)
Common line 8 (Xm+11)
Data line 7 (bit 7)
Data line 6 (bit 6)
Data line 5 (bit 5)
Data line 4 (bit 4)
Data line 3 (bit 3)
Data line 2 (bit 2)
Data line 1 (bit 1)
Data line 0 (bit 0)
State (f)
Key switch off (“0”) Key switch on (“1”)
9.12.14
Other Notes